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How to achieve low-cost, reusable wireless infrastructure through modular baseband design

The key to delivering enhanced performance while lowering costs is the adoption of modular, standards-based architectures and amortizing R&D across multiple products.

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Courtesy of Wireless Net DesignLine

Market realities for cellular service providers require them to support multiple technology standards simultaneously in order to provide for 'triple-play' services. But they must achieve this goal in a severely cost-constrained environment, as noted in Figure 1.

Their need to control spending makes it difficult to fund the widespread deployment of the new technology. Consumers cannot be expected to subscribe to the new services if said services are not readily available, and the service providers cannot fund deploying said services if they do not have a ready pool of subscriptions from which to draw their operating expenditures.

Click here for Figure 1
Figure 1: Market realities for cellular service providers.

The challenge facing service providers also places design pressures on the providers of wireless infrastructure solutions, who must deploy systems capable of supporting significant improvements in data bandwidth while simultaneously achieving cost structures typically associated with much more "mature" technologies.

Over the last decade wireless base station designers have made major strides in their constant struggle to reduce cost, power and footprint. For these designers the goal for 3G base station development is simple: to achieve ten times the bandwidth at one tenth the cost.

Figure 2 illustrates the approach taken by many of these companies in attacking this challenging goal: relying on the concept of modular design, particularly in the base station applications, in order to create scalable and flexible solutions that permit cost-effective deployment while ensuring that performance requirements are met.

One of the key enablers for such an approach is the availability of appropriate open standards that allow for the definition and deployment of system, board, component, and software solutions across a wide ecosystem of vendors, in effect, broadening the range of options available to the equipment vendors, while allowing them to keep tight control on development costs.

Some of the most critical standards needed in supporting this approach are CPRI, OBSAI, ATCA/MicroTCA, and Serial RapidIO. This article will provide a thorough analysis of each of these standards.

Click here for Figure 2
Figure 2: Development strategies of the base station equipment vendors.

Through 2.5G: The current state of technology
Today's base station typically relies on a sequential processing scheme, and every block and processing is time aligned. The architecture often looks like Figure 3. One chip-rate processor (CRP) interfaces to the time-sliced backplane and receives "samples" from the RF card.

While effective in delivering up to 2.5G technologies, this approach struggles to remain cost-effective in the face of deploying 'triple-play' services on 3G and beyond. Since the ASIC and DSP processing allocations are fixed at the time of design, and are tightly coupled with the selection of the hardware, this architecture, typically, is not very scalable.

As a result, some DSPs and CRPs might be underutilized in some base stations, but this inefficiency is allowed to exist because it is very difficult to shift resources from one processing block to another during run time.

Another limitation with this approach is that it is not easy to have the same architecture for pico base station, micro and macro base station, as it is a challenge to scale algorithms developed for the CRPs and DSPs in a given application. For a small performance increment, a whole new group of CRPs and DSPs may need to be added.

As depicted in Figure 3, the memory interface between the CRPs and DSPs can also be a problem for the system software. The bi-directional nature of a standard memory interface can make it harder to fully utilize this interconnect. Usually baseband algorithms are sensitive to non-deterministic delay, which may be introduced using a bi-directional interface.

Click here for Figure 3
Figure 3: Today's typical base band card architecture.



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