San Jose, Calif. — The struggles for more performance, less power and tighter silicon integration in cell phones took center stage at the Microprocessor Forum here last week. ARM Ltd. and Qualcomm Inc. detailed upcoming architectures for 2008-class 3G phones, and a researcher at Japan's NTT Docomo sketched out the road to the next two generations of systems.
Extensions to ARM's Cortex ARMv7 architecture will essentially put a heterogeneous multiprocessing computer on a chip. The extensions include a form of cache coherence tailored to embedded systems and a port that extends cache-coherent data to multimedia accelerator blocks off the main CPU. The company has worked to eliminate locks that create performance bottlenecks for synchronizing CPUs. The extensions include nonblocking interprocessor interrupts.
Qualcomm opened a chip design facility in Research Triangle Park, N.C., in 2003 and bought rights to modify the ARM architecture so it could optimize an application processor for a new high-end cell phone chip set. It presented details on the resulting Scorpion ARMv7 core and Snapdragon chip set at the conference.
The 65-nanometer Scorpion delivers 2,100 Dhrystone Mips at its maximum data rate while consuming less than half a watt--four times the performance of Qualcomm's existing ARMv11. The new chip issues up to two instructions per clock using speculative out-of-order techniques. It includes an enhanced multimedia engine and modified ARM AXI interconnect, which handles out-of-order transactions. Qualcomm crafted novel load/store operations to accelerate multimedia processing in the core with hardware protecting coherence on data fed from cache. The chip can encode and decode H.264 data at CIF resolution while using less than a quarter of its Mips.
Scorpion slides into the Snapdragon phone platform, which includes an array of DSPs and accelerators for baseband and media processing as well as system functions. The platform is implemented in a stack of separate digital, analog and memory dice. The Scorpion CPU that powers the platform will be implemented in a product before year's end, said Mark Schaffer, a Qualcomm principal engineer.
Meanwhile, researchers at leading cell phone carrier Docomo sketched out plans for its next two generations beyond today's wideband code-division multiple access phones, which deliver data rates up to 2 Mbits/second. By 2010, the carrier aims to deploy services based on the Long Term Evolution (LTE) standard, which specifies data rates up to 100 Mbits/s. According to Docomo, that could enable high-definition video recording, video-on-demand and real-time 3-D.
Docomo is already at work on specs for its so-called Super 3G handsets, which use the LTE standard. To power such phones, chip makers will need to integrate application, baseband and radio processors, said Eisuke Miki, chief executive of Docomo's R&D office in Palo Alto, Calif. On the back end, the LTE architecture consolidates today's separate radio network controllers and so-called NodeB systems into one unit, which communicates over Internet Protocol to an access gateway.
Beyond Super 3G, DoCoMo is investigating 4G service, which may arrive in 2020 and offer data rates to 1 Gbit/s.
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