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DACs for DSP, part 2: Interpolating and sigma-delta DACs

Part 2 of this 3-part series looks at interpolating DACs and sigma-delta DACs.

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Part 1 describes the basic structures of digital-to-analog convertors. Part 3 looks at direct digital synthesis (DDS) DACs. It will be published Thursday, January 24.

DAC Logic
The earliest monolithic DACs contained little, if any, logic circuitry, and parallel data had to be maintained on the digital input to maintain the digital output. Today almost all DACs have input latches, and data need only be written once, not maintained.

There are innumerable variations of DAC input structures, but the majority today are "double-buffered." A double-buffered DAC has two sets of latches. Data is initially latched in the first rank and subsequently transferred to the second as shown in Figure 9. There are three reasons why this arrangement is useful.

The first is that it allows data to enter the DAC in many different ways. A DAC without a latch, or with a single latch, must be loaded with all bits at once, in parallel, since otherwise its output during loading may be totally different from what it was or what it is to become. A double-buffered DAC, on the other hand, may be loaded with parallel data, serial data, or with 4-bit or 8-bit words, and the output will be unaffected until the new data is completely loaded and the DAC receives its update instruction.


Figure 9. Double-Buffered DAC Permits Complex Input Structures and Simultaneous Update

The second feature of this type of input structure is that the output clock can operate at a fixed frequency (the DAC update rate), while the input latch can be loaded asynchronously. This is useful in real-time signal reconstruction applications.

The third convenience of the double-buffered structure is that many DACs may be updated simultaneously; data is loaded into the first rank of each DAC in turn, and when all is ready, the output buffers of all DACs are updated at once. There are many DAC applications where the output of several DACs must change simultaneously, and the double-buffered structure allows this to be done very easily.

Most early monolithic high resolution DACs had parallel or byte-wide data ports and tended to be connected to parallel data buses and address decoders and addressed by microprocessors as if they were very small write-only memories (some DACs are not write-only, but can have their contents read as well—this is convenient for some applications but is not very common). A DAC connected to a data bus is vulnerable to capacitive coupling of logic noise from the bus to the analog output, and many DACs today have serial data structures. These are less vulnerable to such noise (since fewer noisy pins are involved), use fewer pins and therefore take less space, and are frequently more convenient for use with modern microprocessors, many of which have serial data ports. Some, but not all, of such serial DACs have data outputs as well as data inputs so that several DACs may be connected in series and data clocked to them all from a single serial port. The arrangement is referred to as "daisy-chaining."

Another development in DACs is the ability to make several on a single chip, which is useful to reduce PCB sizes and assembly costs. Today it is possible to buy sixteen 8-bit, eight 12-bit, four 14-bit, or two 16-/18-/20-/22-/24-bit DACs in a single package. In the future, even higher densities are probable.

Interpolating DACs
In ADC-based systems, oversampling can ease the requirements on the antialiasing filter, and a sigma-delta ADC has this inherent advantage. In a DAC-based system (such as DDS), the concept of interpolation can be used in a similar manner. This concept is common in digital audio CD players, where the basic update rate of the data from the CD is about 44 kSPS. "Zeros" are inserted into the parallel data, thereby increasing the effective update rate to four times, eight times, or 16 times the fundamental throughput rate. The 4×, 8×, or 16× data stream is passed through a digital interpolation filter, which generates the extra data points. The high oversampling rate moves the image frequencies higher, thereby allowing a less complex filter with a wider transition band. The sigma-delta 1-bit DAC architecture represents the ultimate extension of this concept and has become popular in modern CD players.

Page 2: Sigma-Delta DACs  

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