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[Part 2 takes a closer look at sigma-delta ADCs. For a primer on ADCs, see Basics of ADCs and DACs]
The trend in ADCs and DACs is toward higher speeds and higher resolutions at reduced power levels and supply voltages. Modern data converters generally operate on ±5 V (dual supply), 5 V or 3 V (single supply). In fact, the number of 3 V devices is rapidly increasing because of many new markets such as digital cameras, camcorders, and cellular telephones. This trend has created a number of design and applications problems that were much less important in earlier data converters, where ±15 V supplies and ±10 V input ranges were the standard.
Lower supply voltages imply smaller input voltage ranges, and hence more susceptibility to noise from all potential sources: power supplies, references, digital signals, EMI/RFI, and probably most important, improper layout, grounding, and decoupling techniques. Single-supply ADCs often have an input range that is not referenced to ground. Finding compatible single-supply drive amplifiers and dealing with level shifting of the input signal in direct-coupled applications also becomes a challenge.
In spite of these issues, components are now available that allow extremely high resolutions at low supply voltages and low power. This section discusses the applications problems associated with such components and shows techniques for successfully designing them into systems.
The most popular ADCs for DSP applications are based on five fundamental architectures: successive approximation, sigma-delta, flash, subranging (or pipelined), and bit-per-stage (or ripple).
Figure 3-1: Low Power, Low Voltage ADC Design Issues.
Figure 3-2: ADCs for DSP Applications.
Successive-Approximation ADCs
The successive-approximation ADC has been the mainstay of signal conditioning for many years. Recent design improvements have extended the sampling frequency of these ADCs into the megahertz region. The use of internal switched capacitor techniques, along with autocalibration techniques, extends the resolution of these ADCs to 16 bits on standard CMOS processes without the need for expensive thin-film laser trimming.
The basic successive-approximation ADC is shown in Figure 3-3. It performs conversions on command. On the assertion of the CONVERT START command, the sample-and-hold (SHA) is placed in the hold mode, and all the bits of the successive-approximation register (SAR) are reset to "0," except the MSB, which is set to "1." The SAR output drives the internal DAC. If the DAC output is greater than the analog input, this bit in the SAR is reset; otherwise it is left set. The next most significant bit is then set to "1." If the DAC output is greater than the analog input, this bit in the SAR is reset; otherwise it is left set. The process is repeated with each bit in turn. When all the bits have been set, tested, and reset or not as appropriate, the contents of the SAR correspond to the value of the analog input, and the conversion is complete. These bit "tests" can form the basis of a serial output version SAR-based ADC.
The end of conversion is generally indicated by an end-of-convert (EOC), data-ready (DRDY), or a busy signal (actually, not-BUSY indicates end of conversion). The polarities and name of this signal may be different for different SAR ADCs, but the fundamental concept is the same. At the beginning of the conversion interval, the signal goes high (or low) and remains in that state until the conversion is completed, at which time it goes low (or high). The trailing edge is generally an indication of valid output data.
Figure 3-3: Successive-Approximation ADC.
An N-bit conversion takes N steps. It would seem on superficial examination that a 16-bit converter would have twice the conversion time of an 8-bit one, but this is not the case. In an 8-bit converter, the DAC must settle to 8-bit accuracy before the bit decision is made, whereas in a 16-bit converter, it must settle to 16-bit accuracy, which takes a lot longer. In practice, 8-bit successive-approximation ADCs can convert in a few hundred nanoseconds, while 16-bit ones will generally take several microseconds.
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